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gaas, phemt, mmic, low noise amplifier, 0.3 ghz to 20 ghz data sheet hmc1049lp5e rev. b document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2018 analog devices, inc. all rights reserved. technical support www.analog.com features low noise figure: 1.8 db p1db output power: 14.5 dbm p sat output power: 17.5 dbm high gain: 15 db output ip3: 29 dbm supply voltage: v dd = 7 v at 70 ma 50 matched input/output (i/o) 32-lead, 5 mm 5 mm lfcsp package: 25 mm 2 applications test instrumentation high linearity microwave radios vsat and satcom military and space functional block diagram nc nc gnd rfout/v dd nc nc nc nc rfin gnd nc nc n c v g g n c n c n c n c a c g 3 a c g 2 n c n c a c g 1 n c n c n c n c n c nc v dd nc nc 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 hmc1049lp5e 16798-002 figure 1. general description the hmc1049lp5e is a gaas mmic low noise amplifier (lna) that operates between 0.3 ghz and 20 ghz. this lna provides 15 db of small signal gain, 1.8 db noise figure, and an ip3 output of 29 dbm, yet requires only 70 ma from a 7 v supply. the p1db output power of 14.5 dbm enables the lna to function as a local oscillator (lo) driver for balanced, i/q, or image rejection mixers. v dd can also be applied to pin 21, although pin 21 requires a bias tee with v dd = 4 v. the hmc1049lp5e amplifier i/os are internally matched to 50 , and the device is supplied in a compact, leadless 5 mm 5 mm lfcsp package.
hmc1049lp5e data sheet rev. b | page 2 of 14 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ....................................................... 4 esd caution .................................................................................. 4 pin configuration and function descriptions ..............................5 interface schematics .....................................................................6 typical performance characteristics ..............................................7 evaluation printe d circuit board ................................................. 12 packaging and ordering information ......................................... 14 outline dimensions ................................................................... 14 ordering guide .......................................................................... 14 revision history 5 / 20 18 rev. a to rev. b changed hmc1049 to hmc1049lp5e ..................... throughout changes to features section and general description section . 1 c hange to figure 27 caption and figure 28 caption ................ 10 updated outline dimensions ....................................................... 14 changes to ordering guide .......................................................... 14 11/ 20 14 rev. 01.1213 to rev. a this hittite microwave products data sheet has been reformatted to meet the styles and standards of analog device s, inc. updated format .................................................................. universal changes to general description ..................................................... 1 change to table 2, thermal resistance parameter column ....... 4 added figure 2 ................................................................................... 5 changes to table 4 ............................................................................. 5 moved figure 3 to figure 9 to interface schematics section ...... 6 change to figure 8 and figure 9 ..................................................... 6 changes to figure 36 ...................................................................... 13 added ordering guide section .................................................... 15
data sheet hmc1049lp5e rev. b | page 3 of 14 specifications t a = 25 c, v dd = 7 v, i dd = 70 ma 1 . table 1 . parameter min typ max min typ max min typ max unit frequency range 0.3 1 1 14 14 20 ghz gain 13.5 16.5 12 15 10 13 db gain variation over temperature 0.006 0.019 0.017 db/c noise figure 2.5 3.5 1.8 2.5 2.7 4.0 db return loss input 15 13 14 db output 8 15 13 db output output power for 1 db compression (p1db ) 15 14.5 13 dbm saturated (p sat ) 18 17.5 16 dbm output third - order intercept (ip3) 2 31 29 26 dbm total supply current 70 70 70 ma 1 adjust v gg bet ween ? 2 v to 0 v to achieve i dd = 70 ma typical. 2 measurement taken at p out /tone = 8 dbm .
hmc1049lp5e data sheet rev. b | page 4 of 14 absolute maximum ratings table 2. parameter rating drain bias voltage (v dd ) 10 v drain bias voltage (rf out/v dd ) 7 v rf input power 18 dbm gate bias voltage, v gg ?2 v to +0.2 v channel temperature 175c continuous p diss (t = 85c) (derate 37.1 mw/c above 85c) 3.34 w thermal resistance (channel to ground paddle) 26.9c/w temperature storage temperature ?65c to +150c operating temperature ?40c to +85c esd sensitivity (hbm) class 1a stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. table 3. typical supply current vs. v dd v dd (v) i dd 1 (ma) 5 70 6 70 7 70 1 adjust v gg to achieve i dd = 70 ma. esd caution
data sheet hmc1049lp5e rev. b | page 5 of 14 pin configuration an d function descripti ons nc nc gnd rfout/v dd nc nc nc nc rfin gnd nc nc nc v gg nc nc nc nc acg3 acg2 nc nc acg1 nc nc nc nc nc nc v dd nc nc 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 hmc1049lp5e top view (not to scale) notes 1. nc = no connect. these pins are not connected internally; however, all data was measured with these pins connected to rf/dc ground externally. 2. exposed pad. the exposed ground paddle must be connected to rf/dc ground. 16798-004 figure 2 . pin configuration diagram table 4 . pin function descriptions pin n o. mnem onic description 1 1, 3, 6 to 12, 14, 17 to 20, 23 to 29, 31, 32 nc no connect. the se pins are not connected inter n ally; however, all d ata was measured with these pins connected to rf/ dc ground externally (see the typical performance characteristics section for data plots) . 5 rfin rf input. this pin is dc - coupled and matched to 50 ?. 2 v dd power supply voltage for the amplifier. external bypass capacitors (100 pf and 0.01 f) are required. 30 acg1 low frequency termination. an e xternal bypass capacitor of 100 pf is required. 21 rfout/v dd rf output /alternate power supply voltage for t he amplifie r. a n external bias t ee is required when used as alternative v dd . this pin is dc - coupled and matched to 50 ?. 15, 16 acg2, acg3 low freq uency termination. e xternal bypass capacitors of 100 pf are required. 13 v gg gate control for amplifier. adjust the voltage to achieve i dd = 70 ma. external bypass capacitors of 100 pf, 0.01 f, and 4.7f are required. 4, 22 gnd ground. connect pin 4 a nd pin 22 to rf/dc ground. 0 ep exposed pad. the exposed ground paddle must be connected to rf/dc ground. 1 see the interface schematics section for pin interfaces.
hmc1049lp5e data sheet rev. b | page 6 of 14 interface schematics v dd 16798-005 figure 3. v dd interface gnd 16798-006 figure 4 . gnd interface rfin acg2 16798-007 figure 5 . rfin interface v gg 16798-008 figure 6. v gg interface rfin acg2 acg3 16798-009 figure 7 . acg2 and acg3 interface rfout/v dd 16798-010 figure 8 . rfout /v dd interface acg1 rfout/v dd 16798-0 1 1 figure 9 . acg1 interface
data sheet hmc1049lp5e rev. b | page 7 of 14 typical performance characteristics data taken with v dd applied to p in 2 , v dd = 7 v. 20 ?25 ?20 ?15 ?10 ?5 0 5 10 15 0 2 4 6 8 10 12 14 16 18 24 22 20 response (db) frequency (ghz) s22 s11 s21 16798-036 figure 10 . broadband gain and return loss 20 18 16 14 12 10 8 6 0 2 4 6 8 10 12 14 16 18 20 gain (db) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-037 figure 11 . gain vs. temperature 0 ?5 ?30 ?25 ?20 ?15 ?10 0 2 4 6 8 10 12 14 16 18 20 return loss (db) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-038 figure 12 . input return loss vs. temperature 0 ?30 ?25 ?20 ?15 ?10 ?5 0 2 4 6 8 10 12 14 16 18 20 return loss (db) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-039 figure 13 . output return loss vs. temperature 6 0 1 2 3 4 5 0 2 4 6 8 10 12 14 16 18 20 noise figure (db) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-040 figure 14 . noise figure vs. temperature 6 0 1 2 3 4 5 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 noise figure (db) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-041 figure 15 . noise figure vs. temperature, low frequency
hmc1049lp5e data sheet rev. b | page 8 of 14 6 0 1 2 3 4 5 0 2 4 6 8 10 12 14 16 18 20 noise figure (db) frequency (ghz) v dd = 8v v dd = 7v v dd = 6v 16798-042 figure 16 . noise figure vs. v dd 6 0 1 2 3 4 5 0 2 4 6 8 10 12 14 16 18 20 noise figure (db) frequency (ghz) i dd = 80ma i dd = 70ma i dd = 60ma 16798-043 figure 17 . noise figure vs. i dd 35 30 25 20 15 10 0 2 4 6 8 10 12 14 16 18 20 ip3 (dbm) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-044 figure 18 . output ip3 vs. temperature 20 17 14 11 8 5 0 2 4 6 8 10 12 14 16 18 20 p1db (dbm) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-045 figure 19 . p1db v s. temperature 23 20 17 14 11 8 0 2 4 6 8 10 12 14 16 18 20 p sat (dbm) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-046 figure 20 . p sat vs. temperature 18 16 14 12 10 8 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 p1db (dbm) frequency (ghz) v dd = 7v v dd = 6v v dd = 5v 16798-047 figure 21 . p1db vs. v dd
data sheet hmc1049lp5e rev. b | page 9 of 14 20 18 16 14 12 10 8 4 6 0 2 4 6 8 10 12 14 16 18 20 p sat (dbm) frequency (ghz) v dd = 7v v dd = 6v v dd = 5v 16798-048 figure 22 . p sat vs. v dd 0 ?45 ?40 ?35 ?30 ?25 ?20 ?15 ?10 ?5 0 2 4 6 8 10 12 14 16 18 20 isolation (db) frequency (ghz) t a = ?40c t a = +25c t a = +85c 16798-049 figure 23 . reverse isolation vs. temperat ure 24 20 16 12 8 4 0 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 p out (dbm), gain (db), pae (%) input power (dbm) pae p out gain 16798-050 figure 24 . power compression at 2 ghz 24 20 16 12 8 4 0 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 p out (dbm), gain (db), pae (%) input power (dbm) pae p out gain 16798-051 figure 25 . power compression at 10 ghz
hmc1049lp5e data sheet rev. b | page 10 of 14 20 16 12 8 4 0 ?9 ?6 ?3 0 3 6 9 p out (dbm), gain (db), pae (%) input power (dbm) pae p out gain 16798-052 figure 26. power compression at 18 ghz 24 18 12 6 0 4 3 2 1 0 5.0 5.5 6.0 6.5 7.0 gain (db), p sat (dbm) noise figure (db) v dd (v) noise figure p sat gain 16798-053 figure 27. gain, p sat , and noise figure vs. v dd at 12 ghz 24 18 12 6 0 4 3 2 1 0 50 60 70 80 gain (db), p sat (dbm) noise figure (db) i dd (ma) noise figure p sat gain 16798-054 figure 28. gain, p sat , and noise figure vs. i dd at 12 ghz
data sheet hmc1049lp5e rev. b | page 11 of 14 data taken with v dd applied to the bias tee at p in 21. frequenc y (ghz) ?30 ?20 ?10 0 10 20 0 4 8 16 20 24 12 response (db) s21 s 1 1 s22 16798-055 figure 29 . broadband gain and return loss, v dd = 4 v, supply t o bias tee 6 8 10 12 14 16 18 20 frequenc y (ghz) 0 4 8 16 20 12 2 6 10 18 14 gain (db) t a = ?40c t a = +25c t a = +85c 16798-056 figure 30 . gain vs. temperature, v dd = 4 v, supply t o bias tee 0 1 2 3 4 5 6 noise figure (db) frequenc y (ghz) 0 4 8 16 20 12 2 6 10 18 14 t a = ?40c t a = +25c t a = +85c 16798-057 figure 31 . noise figure vs. temperature, v dd = 4 v, supply t o bias tee frequenc y (ghz) 10 15 20 25 30 35 40 0 4 8 16 20 12 2 6 10 18 14 ip3 (dbm) t a = ?40c t a = +25c t a = +85c 16798-058 figure 32 . output ip3 vs. temperature, v dd = 4 v, supply t o bias tee 0 frequenc y (ghz) 8 1 1 14 17 20 0 4 8 16 20 12 2 6 10 18 14 p1db (dbm) t a = ?40c t a = +25c t a = +85c 16798-059 figure 33 . p1db vs. temperature, v dd = 4 v, supply t o bias tee frequency (ghz) 8 10 12 14 16 18 20 22 24 0 4 8 16 20 12 2 6 10 18 14 p sat (dbm) t a = ?40c t a = +25c t a = +85c 16798-060 figure 34 . p sat vs. temperature, v dd = 4 v, supply t o bias tee
hmc1049lp5e data sheet rev. b | page 12 of 14 evaluation printed c ircuit board in out v dd v gg 600-00541-00-1 j3 j4 c9 u1 c7 c1 c2 c3 c4 c5 c6 c8 j5 j6 h1049 xxxx j1 j2 u1 16798-065 figure 35 . e valuation board layout package base gnd rfout/v dd gnd v dd hmc1049lp5e 1 2 3 4 5 6 7 8 24 23 22 21 20 19 18 17 32 31 30 29 28 27 26 25 9 10 11 12 13 14 15 16 rfin acg1 v gg acg3 acg2 v dd in + c8 4.7f + c9 4.7f c5 10nf c2 100pf c6 10nf c7 10nf c3 100pf c1 100pf c4 100pf out j2 j3 j1 j4 16798-066 figure 36 . evaluation board schematic
data sheet hmc1049lp5e rev. b | page 13 of 14 table 5 . list of materials f or evaluation pcb item description j1, j2, j5, j6 pcb m ount sma rf c onnector j3, j4 dc p ins c1 to c4 100 pf c apacitor, 0402 package c5 to c7 10000 pf c apacitor, 0402 package c8 , c9 4.7 f c apacitor, tantalum u1 hmc1049lp5e pcb 1 600- 00541 -00 - 1 evaluation pcb 1 circuit board material: rogers 4350 or arlon 25fr . the circuit board used in the application should use rf circuit design techniques. signal lines should have 50 ? impedance ; c onnect the package ground leads and exposed paddle directly to the ground plane. use a sufficient number of via holes to connect the top and bottom ground planes. the evaluation circuit board shown is available from analog devices, inc., upon request.
hmc1049lp5e data sheet rev. b | page 14 of 14 packaging and ordering information outline dimensions 03-09-2017-b 1 0.50 bsc bottom view top view pin 1 indicator 32 9 16 17 24 25 8 exposed pad seating plane 0.05 max 0.02 nom 0.20 ref coplanarity 0.08 0.30 0.25 0.18 5.10 5.00 sq 4.90 0.90 0.85 0.80 0.45 0.40 0.35 0.20 min 3.80 3.70 sq 3.60 compliant to jedec standards mo-220-vhhd-4. pkg-004898 3.50 ref p i n 1 i n d i c a t o r a r e a o p t i o n s ( s e e d e t a i l a ) detail a (jedec 95) for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. figure 37. 32-lead lead frame chip scale package [lfcsp] 5 mm 5 mm and 0.85 mm package height (hcp-32-1) dimensions shown in millimeters ordering guide model 1 temperature range lead finish moisture sensitivity level (msl) rating 2 package description ordering quantity package option hmc1049lp5e ?40c to +85c 100% matte sn msl1 32-lead lfcsp hcp-32-1 hmc1049lp5etr ?40c to +85c 100% matte sn msl1 32-lead lfcsp, 7 tape and reel 500 hcp-32-1 EVAL01-HMC1049LP5 evaluation board 1 all models are rohs compliant parts. 2 msl1 rating indicates a maximum pe ak reflow temper ature of 260c. ?2018 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d16798-0-5/18(b) www.analog.com/hmc1049lp5e

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